Hardware in The Loop Tests

<< Click to Display Table of Contents >>

Navigation:  STM32F4 Target > Demos > Waijung Demos >

Hardware in The Loop Tests

Previous pageReturn to chapter overviewNext page
Show/Hide Hidden Text

Demo files:

hil0_host_demo.mdl

hil1_host_demo.mdl

hil1_target_demo.mdl

hil2_host_demo.mdl

hil2_target_demo.mdl

hil3_host_demo.mdl

hil3_target_demo.mdl

 

hmtoggle_plus1Overview

For Waijung, Hardware in the Loop (HIL) Test refers to all simulation scenarios where some kind of hardware is included in simulation loops.

The followings show example usages of HIL Test with Waijung.

In each simulation scenarios, notice the use of Enable initial value (Closed loop HIL test) feature.

When Enable initial value (Closed loop HIL test) is checked, the host Simulnk model automatically transmits initial values to the target as soon as the simulation start, prior to entering simulation loop. This ensures correct data exchange between target and host. This setting is required for Test Case 1 HIL test type only.

Users must always manually reset the target hardware to have proper initial values before restarting each HIL Test run.

hmtoggle_plus1Setting Summary

For correct real-time performance use the following setting for various HIL Tests.

Case

Host Side

Target Side

Host Serial Rx Block

Host Serial Tx Block

Target Serial Rx Block

Target Serial Tx Block

Transfer Mode

Enable initial value
(Closed loop HIL test)

Transfer Mode

Transfer Mode

Transfer Mode

Test Case 1: Discrete-Time HIL Test (Algorithm in host PC - Plant in target)

Blocking

Checked

Blocking

Blocking

Blocking

Test Case 2: Discrete-Time HIL Test (Algorithm in target - Plant in host PC)

Blocking

NOT Checked

Blocking

Blocking

Blocking

Test Case 3: Discrete-Time Control (Algorithm in target - Continuous-Time Plant in host PC)

Blocking

NOT Checked

Blocking

Blocking

Blocking

hmtoggle_plus1Test Settings

The test case is a simple closed loop controller as shown below.

The test compares outputs between continuous-time and discrete-time model running under pure simulation testing.

hil0_demo

The following picture shows simulation results.

hil0_results

 

hmtoggle_plus1Test Case 1: Discrete-Time HIL Test (Algorithm in host PC - Plant in target)

This HIL test compares simulation results between.

1) Plant is running in the host PC.

2) Plant is running in the target board.

The control algorithm runs in the host PC for both cases.

 

hil1_demo

The following show the simulation results.

hil1_results

hmtoggle_plus1Test Case 2: Discrete-Time HIL Test (Algorithm in target - Plant in host PC)

This HIL test compares simulation results between.

1) Controller is running in the host PC.

2) Controller is running in the target board.

The plant model runs in the host PC for both cases.

hil2_demo

The following show the simulation results.

hil2_results

hmtoggle_plus1Test Case 3: Discrete-Time Control (Algorithm in target - Continuous-Time Plant in host PC)

This HIL test compares simulation results between.

1) Discrete-time controller is running in the host PC.

2) Discrete-time controller is running in the target board.

The continuous-time plant model runs in the host PC for both cases.

hil3_demo

The following show the simulation results.

hil3_results