Host Serial Rx

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Host Serial Rx

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User Interface

How this block appears in a Simulink model?

host_serial_rx_block

Location for the block: Waijung Blockset -> Communication-> Host Serial Port

Packet mode Ascii

What can be configured?

host_serial_rx_mask_ascii

Configuration item

Selectable option/ Value

Description

Port

<auto> | <specify>

When port select as <auto>, the block will scan for available port automatically.

Transfer

Blocking | Non-Blocking

Select block transfer mode:

Blocking - the block wait for data.

Non-Blocking - the block did not wait for data, data receiving status indicate by READY port.

Packet mode

Ascii | Binary | BinaryVector

Select data packet mode to receive,

Ascii - data to be transmitted is encoded as Ascii.

Binary - data to to be receive is binary.

BinaryVector - Same as Binary format, but the output port will be vector.

Wait time-out (sec)

<Specify>

Available when transfer is Blocking.

Enable Initial value (Closed loop HIL test)

Checked | Unchecked

Enable or disable sending initial value .

Initial values

<Specify>

This is optional for transfer Blocking, to prevent Locked loop state when run close loop HIL test. It's return the initial value at first step.

Note: Empty value ([]) equivalent to disable initial value.

Ascii format

<specify>

Ascii formatter:

%u, %i, %o, %x: uint32

%d: int32

%e, %g, %f: single

%c: int8

End of packet

LF (0x0A - "\n") |

CR (0x0D - "\r") |

CRLF (0x0D 0x0A - "\r\n") |

Select packet terminator for Ascii packet.

Sample time (sec)

-1 for inherited or <specify>

Specify sample time for the block

Packet mode Binary and Binary Vector

What can be configured?

host_serial_rx_mask_binary