Peripherals Summary

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Peripherals Summary

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Pin out and Pin Descriptions

STM32F405xx -STM32F407xx
STM32F415xx-STM32F417xx

 

STM32F405xx - STM32F407xx

Pin name

(function after reset)(1)

01_STM32F405RG_name

02_STM32F405OG_name

03_STM32F405OE_name

04_STM32F405VG_name

05_STM32F405ZG_name

06_STM32F407VE_name

07_STM32F407VG_name

08_STM32F407ZE_name

09_STM32F407ZG_name

10_STM32F407IE_name

11_STM32F407IE_name

12_STM32F407IG _name

13_STM32F407IG_name

Pin

type

I / O

structure

Notes

Alternate functions

Additional

functions

PE2

-

-

-

1

1

1

1

1

1

A2

1

A2

1

I/O

FT

 

TRACECLK/ FSMC_A23 / ETH_MII_TXD3 / EVENTOUT

 

PE3

-

-

-

2

2

2

2

2

2

A1

2

A1

2

I/O

FT

 

TRACED0/FSMC_A19 / EVENTOUT

 

PE4

-

-

-

3

3

3

3

3

3

B1

3

B1

3

I/O

FT

 

TRACED1/FSMC_A20 / DCMI_D4/ EVENTOUT

 

PE5

-

-

-

4

4

4

4

4

4

B2

4

B2

4

I/O

FT

 

TRACED2 / FSMC_A21 / TIM9_CH1 / DCMI_D6 / EVENTOUT

 

PE6

-

-

-

5

5

5

5

5

5

B3

5

B3

5

I/O

FT

 

TRACED3 / FSMC_A22 / TIM9_CH2 / DCMI_D7 / EVENTOUT

 

VBAT

1

A10

A10

6

6

6

6

6

6

C1

6

C1

6

S

 

 

 

 

PI8

-

-

-

-

-

-

-

-

-

D2

7

D2

7

I/O

FT

(2)(3)

EVENTOUT

RTC_AF2

PC13

2

A9

A9

7

7

7

7

7

7

D1

8

D1

8

I/O

FT

(2)(3)

EVENTOUT

RTC_AF1

PC14-OSC32_IN (PC14)

3

B10

B10

8

8

8

8

8

8

E1

9

E1

9

I/O

FT

(2)(3)

EVENTOUT

OSC32_IN(4)

PC15­OSC32_OUT (PC15)

4

B9

B9

9

9

9

9

9

9

F1

10

F1

10

I/O

FT

(2)(3)

EVENTOUT

OSC32_OUT(4)

PI9

-

-

-

-

-

-

-

-

-

D3

11

D3

11

I/O

FT

 

CAN1_RX / EVENTOUT

 

PI10

-

-

-

-

-

-

-

-

-

E3

12

E3

12

I/O

FT

 

ETH_MII_RX_ER / EVENTOUT

 

PI11

-

-

-

-

-

-

-

-

-

E4

13

E4

13

I/O

FT

 

OTG_HS_ULPI_DIR / EVENTOUT

 

VSS

-

-

-

-

-

-

-

-

-

F2

14

F2

14

S

 

 

 

 

VDD

-

-

-

-

-

-

-

-

-

F3

15

F3

15

S

 

 

 

 

PF0

-

-

-

-

10

-

-

10

10

E2

16

E2

16

I/O

FT

 

FSMC_A0 / I2C2_SDA / EVENTOUT

 

PF1

-

-

-

-

11

-

-

11

11

H3

17

H3

17

I/O

FT

 

FSMC_A1 / I2C2_SCL / EVENTOUT

 

PF2

-

-

-

-

12

-

-

12

12

H2

18

H2

18

I/O

FT

 

FSMC_A2 / I2C2_SMBA / EVENTOUT

 

PF3

-

-

-

-

13

-

-

13

13

J2

19

J2

19

I/O

FT

(4)

FSMC_A3/EVENTOUT

ADC3_IN9

PF4

-

-

-

-

14

-

-

14

14

J3

20

J3

20

I/O

FT

(4)

FSMC_A4/EVENTOUT

ADC3_IN14

PF5

-

-

-

-

15

-

-

15

15

K3

21

K3

21

I/O

FT

(4)

FSMC_A5/EVENTOUT

ADC3_IN15

VSS

-

C9

C9

10

16

10

10

16

16

G2

22

G2

22

S

 

 

 

 

VDD

-

B8

B8

11

17

11

11

17

17

G3

23

G3

23

S

 

 

 

 

PF6

-

-

-

-

18

-

-

18

18

K2

24

K2

24

I/O

FT

(4)

TIM10_CH1 / FSMC_NIORD/ EVENTOUT

ADC3_IN4

PF7

-

-

-

-

19

-

-

19

19

K1

25

K1

25

I/O

FT

(4)

TIM11_CH1/FSMC_NREG/ EVENTOUT

ADC3_IN5

PF8

-

-

-

-

20

-

-

20

20

L3

26

L3

26

I/O

FT

(4)

TIM13_CH1 / FSMC_NIOWR/ EVENTOUT

ADC3_IN6

PF9

-

-

-

-

21

-

-

21

21

L2

27

L2

27

I/O

FT

(4)

TIM14_CH1 / FSMC_CD/ EVENTOUT

ADC3_IN7

PF10

-

-

-

-

22

-

-

22

22

L1

28

L1

28

I/O

FT

(4)

FSMC_INTR/ EVENTOUT

ADC3_IN8

PH0-OSC_IN (PH0)

5

F10

F10

12

23

12

12

23

23

G1

29

G1

29

I/O

FT

 

EVENTOUT

OSC_IN(4)

PH1-OSC_OUT (PH1)

6

F9

F9

13

24

13

13

24

24

H1

30

H1

30

I/O

FT

 

EVENTOUT

OSC_OUT(4)

NRST

7

G10

G10

14

25

14

14

25

25

J1

31

J1

31

I/O

RST

 

 

 

PC0

8

E10

E10

15

26

15

15

26

26

M2

32

M2

32

I/O

FT

(4)

OTG_HS_ULPI_STP/ EVENTOUT

ADC123_IN10

PC1

9

-

-

16

27

16

16

27

27

M3

33

M3

33

I/O

FT

(4)

ETH_MDC/ EVENTOUT

ADC123_IN11

PC2

10

D10

D10

17

28

17

17

28

28

M4

34

M4

34

I/O

FT

(4)

SPI2_MISO / OTG_HS_ULPI_DIR / TH_MII_TXD2 /I2S2ext_SD/ EVENTOUT

ADC123_IN12

PC3

11

E9

E9

18

29

18

18

29

29

M5

35

M5

35

I/O

FT

(4)

SPI2_MOSI / I2S2_SD / OTG_HS_ULPI_NXT / ETH_MII_TX_CLK/EVENTOUT

ADC123_IN13

VDD

-

-

-

19

30

19

19

30

30

G3

36

G3

36

S

 

 

 

 

VSSA

12

H10

H10

20

31

20

20

31

31

M1

37

M1

37

S

 

 

 

 

VREF–

-

-

-

-

-

-

-

-

-

N1

-

N1

-

S

 

 

 

 

VREF+

-

-

-

21

32

21

21

32

32

P1

38

P1

38

S

 

 

 

 

VDDA

13

G9

G9

22

33

22

22

33

33

R1

39

R1

39

S

 

 

 

 

PA0-WKUP (PA0)

14

C10

C10

23

34

23

23

34

34

N3

40

N3

40

I/O

FT

(5)

USART2_CTS/ UART4_TX/ ETH_MII_CRS / TIM2_CH1_ETR/ TIM5_CH1 / TIM8_ETR/ EVENTOUT

ADC123_IN0/WKUP(4)

PA1

15

F8

F8

24

35

24

24

35

35

N2

41

N2

41

I/O

FT

(4)

USART2_RTS / UART4_RX/ ETH_RMII_REF_CLK / ETH_MII_RX_CLK / TIM5_CH2 / TIMM2_CH2/ EVENTOUT

ADC123_IN1

PA2

16

J10

J10

25

36

25

25

36

36

P2

42

P2

42

I/O

FT

(4)

USART2_TX/TIM5_CH3 / TIM9_CH1 / TIM2_CH3 / ETH_MDIO/ EVENTOUT

ADC123_IN2

PH2

-

-

-

-

-

-

-

-

-

F4

43

F4

43

I/O

FT

 

ETH_MII_CRS/EVENTOUT

 

PH3

-

-

-

-

-

-

-

-

-

G4

44

G4

44

I/O

FT

 

ETH_MII_COL/EVENTOUT

 

PH4

-

-

-

-

-

-

-

-

-

H4

45

H4

45

I/O

FT

 

I2C2_SCL / OTG_HS_ULPI_NXT/ EVENTOUT

 

PH5

-

-

-

-

-

-

-

-

-

J4

46

J4

46

I/O

FT

 

I2C2_SDA/ EVENTOUT

 

PA3

17

H9

H9

26

37

26

26

37

37

R2

47

R2

47

I/O

FT

(4)

USART2_RX/TIM5_CH4 / TIM9_CH2 / TIM2_CH4 / OTG_HS_ULPI_D0 / ETH_MII_COL/ EVENTOUT

ADC123_IN3

VSS

18

E5

E5

27

38

27

27

38

38

-

48

-

48

S

 

 

 

 

BYPASS_REG

 

D9

D9

 

 

 

 

 

 

L4

-

L4

-

I

FT

 

 

 

VDD

19

E4

E4

28

39

28

28

39

39

K4

49

K4

49

S

 

 

 

 

PA4

20

J9

J9

29

40

29

29

40

40

N4

50

N4

50

I/O

TC

(4)

SPI1_NSS / SPI3_NSS / USART2_CK / DCMI_HSYNC / OTG_HS_SOF/ I2S3_WS/ EVENTOUT

ADC12_IN4 /DAC1_OUT

PA5

21

G8

G8

30

41

30

30

41

41

P4

51

P4

51

I/O

TC

(4)

SPI1_SCK/ OTG_HS_ULPI_CK / TIM2_CH1_ETR/ TIM8_CHIN/ EVENTOUT

ADC12_IN5/ DAC2_OUT

PA6

22

H8

H8

31

42

31

31

42

42

P3

52

P3

52

I/O

FT

(4)

SPI1_MISO / TIM8_BKIN/TIM13_CH1 / DCMI_PIXCLK / TIM3_CH1 / TIM1_BKIN/EVENTOUT

ADC12_IN6

PA7

23

J8

J8

32

43

32

32

43

43

R3

53

R3

53

I/O

FT

(4)

SPI1_MOSI/ TIM8_CH1N / TIM14_CH1/TIM3_CH2/ ETH_MII_RX_DV / TIM1_CH1N / RMII_CRS_DV/ EVENTOUT

ADC12_IN7

PC4

24

-

-

33

44

33

33

44

44

N5

54

N5

54

I/O

FT

(4)

ETH_RMII_RX_D0 / ETH_MII_RX_D0/ EVENTOUT

ADC12_IN14

PC5

25

-

-

34

45

34

34

45

45

P5

55

P5

55

I/O

FT

(4)

ETH_RMII_RX_D1 / ETH_MII_RX_D1/ EVENTOUT

ADC12_IN15

PB0

26

G7

G7

35

46

35

35

46

46

R5

56

R5

56

I/O

FT

(4)

TIM3_CH3 / TIM8_CH2N/ OTG_HS_ULPI_D1/ ETH_MII_RXD2 / TIM1_CH2N/ EVENTOUT

ADC12_IN8

PB1

27

H7

H7

36

47

36

36

47

47

R4

57

R4

57

I/O

FT

(4)

TIM3_CH4 / TIM8_CH3N/ OTG_HS_ULPI_D2/ ETH_MII_RXD3 / TIM1_CH3N/ EVENTOUT

ADC12_IN9

PB2-BOOT1 (PB2)

28

J7

J7

37

48

37

37

48

48

M6

58

M6

58

I/O

FT

 

EVENTOUT

 

PF11

-

-

-

-

49

-

-

49

49

R6

59

R6

59

I/O

FT

 

DCMI_12/ EVENTOUT

 

PF12

-

-

-

-

50

-

-

50

50

P6

60

P6

60

I/O

FT

 

FSMC_A6/ EVENTOUT

 

VSS

-

-

-

-

51

-

-

51

51

M8

61

M8

61

S

 

 

 

 

VDD

-

-

-

-

52

-

-

52

52

N8

62

N8

62

S

 

 

 

 

PF13

-

-

-

-

53

-

-

53

53

N6

63

N6

63

I/O

FT

 

FSMC_A7/ EVENTOUT

 

PF14

-

-

-

-

54

-

-

54

54

R7

64

R7

64

I/O

FT

 

FSMC_A8/ EVENTOUT

 

PF15

-

-

-

-

55

-

-

55

55

P7

65

P7

65

I/O

FT

 

FSMC_A9/ EVENTOUT

 

PG0

-

-

-

-

56

-

-

56

56

N7

66

N7

66

I/O

FT

 

FSMC_A10/ EVENTOUT

 

PG1

-

-

-

-

57

-

-

57

57

M7

67

M7

67

I/O

FT

 

FSMC_A11/ EVENTOUT

 

PE7

-

G6

G6

38

58

38

38

58

58

R8

68

R8

68

I/O

FT

 

FSMC_D4/TIM1_ETR/ EVENTOUT

 

PE8

-

H6

H6

39

59

39

39

59

59

P8

69

P8

69

I/O

FT

 

FSMC_D5/ TIM1_CH1N/ EVENTOUT

 

PE9

-

J6

J6

40

60

40

40

60

60

P9

70

P9

70

I/O

FT

 

FSMC_D6/TIM1_CH1/ EVENTOUT

 

VSS

-

-

-

-

61

-

-

61

61

M9

71

M9

71

S

 

 

 

 

VDD

-

-

-

-

62

-

-

62

62

N9

72

N9

72

S

 

 

 

 

PE10

-

F6

F6

41

63

41

41

63

63

R9

73

R9

73

I/O

FT

 

FSMC_D7/TIM1_CH2N/ EVENTOUT

 

PE11

 

J5

J5

42

64

42

42

64

64

P10

74

P10

74

I/O

FT

 

FSMC_D8/TIM1_CH2/ EVENTOUT

 

PE12

-

H5

H5

43

65

43

43

65

65

R10

75

R10

75

I/O

FT

 

FSMC_D9/TIM1_CH3N/ EVENTOUT

 

PE13

-

G5

G5

44

66

44

44

66

66

N11

76

N11

76

I/O

FT

 

FSMC_D10/TIM1_CH3/ EVENTOUT

 

PE14

-

F5

F5

45

67

45

45

67

67

P11

77

P11

77

I/O

FT

 

FSMC_D11/TIM1_CH4/ EVENTOUT

 

PE15

-

G4

G4

46

68

46

46

68

68

R11

78

R11

78

I/O

FT

 

FSMC_D12/TIM1_BKIN/ EVENTOUT

 

PB10

29

H4

H4

47

69

47

47

69

69

R12

79

R12

79

I/O

FT

 

SPI2_SCK / I2S2_CK / I2C2_SCL/ USART3_TX / OTG_HS_ULPI_D3 / ETH_MII_RX_ER / TIM2_CH3/ EVENTOUT

 

PB11

30

J4

J4

48

70

48

48

70

70

R13

80

R13

80

I/O

FT

 

I2C2_SDA/USART3_RX/ OTG_HS_ULPI_D4 / ETH_RMII_TX_EN/ ETH_MII_TX_EN / TIM2_CH4/ EVENTOUT

 

VCAP_1

31

F4

F4

49

71

49

49

71

71

M10

81

M10

81

S

 

 

 

 

VDD

32

-

-

50

72

50

50

72

72

N10

82

N10

82

S

 

 

 

 

PH6

-

-

-

-

-

-

-

-

-

M11

83

M11

83

I/O

FT

 

I2C2_SMBA / TIM12_CH1 / ETH_MII_RXD2/ EVENTOUT

 

PH7

-

-

-

-

-

-

-

-

-

N12

84

N12

84

I/O

FT

 

I2C3_SCL / ETH_MII_RXD3/ EVENTOUT

 

PH8

-

-

-

-

-

-

-

-

-

M12

85

M12

85

I/O

FT

 

I2C3_SDA / DCMI_HSYNC/ EVENTOUT

 

PH9

-

-

-

-

-

-

-

-

-

M13

86

M13

86

I/O

FT

 

I2C3_SMBA / TIM12_CH2/ DCMI_D0/ EVENTOUT

 

PH10

-

-

-

-

-

-

-

-

-

L13

87

L13

87

I/O

FT

 

TIM5_CH1 / DCMI_D1/ EVENTOUT

 

PH11

-

-

-

-

-

-

-

-

-

L12

88

L12

88

I/O

FT

 

TIM5_CH2 / DCMI_D2/ EVENTOUT

 

PH12

-

-

-

-

-

-

-

-

-

K12

89

K12

89

I/O

FT

 

TIM5_CH3 / DCMI_D3/ EVENTOUT

 

VSS

-

-

-

-

-

-

-

-

-

H12

90

H12

90

S

 

 

 

 

VDD

-

-

-

-

-

-

-

-

-

J12

91

J12

91

S

 

 

 

 

PB12

33

J3

J3

51

73

51

51

73

73

P12

92

P12

92

I/O

FT

 

SPI2_NSS / I2S2_WS / I2C2_SMBA/ USART3_CK/ TIM1_BKIN / CAN2_RX / OTG_HS_ULPI_D5/ ETH_RMII_TXD0 / ETH_MII_TXD0/ OTG_HS_ID/ EVENTOUT

 

PB13

34

J1

J1

52

74

52

52

74

74

P13

93

P13

93

I/O

FT

 

SPI2_SCK / I2S2_CK / USART3_CTS/ TIM1_CH1N /CAN2_TX / OTG_HS_ULPI_D6 / ETH_RMII_TXD1 / ETH_MII_TXD1/ EVENTOUT

OTG_HS_VBUS

PB14

35

J2

J2

53

75

53

53

75

75

R14

94

R14

94

I/O

FT

 

SPI2_MISO/ TIM1_CH2N / TIM12_CH1 / OTG_HS_DM/ USART3_RTS / TIM8_CH2N/I2S2ext_SD/ EVENTOUT

 

PB15

36

H1

H1

54

76

54

54

76

76

R15

95

R15

95

I/O

FT

 

SPI2_MOSI / I2S2_SD/ TIM1_CH3N / TIM8_CH3N / TIM12_CH2 / OTG_HS_DP/ EVENTOUT

 

PD8

-

H2

H2

55

77

55

55

77

77

P15

96

P15

96

I/O

FT

 

FSMC_D13 / USART3_TX/ EVENTOUT

 

PD9

-

H3

H3

56

78

56

56

78

78

P14

97

P14

97

I/O

FT

 

FSMC_D14 / USART3_RX/ EVENTOUT

 

PD10

-

G3

G3

57

79

57

57

79

79

N15

98

N15

98

I/O

FT

 

FSMC_D15 / USART3_CK/ EVENTOUT

 

PD11

-

G1

G1

58

80

58

58

80

80

N14

99

N14

99

I/O

FT

 

FSMC_CLE / FSMC_A16/USART3_CTS/ EVENTOUT

 

PD12

-

G2

G2

59

81

59

59

81

81

N13

100

N13

100

I/O

FT

 

FSMC_ALE/ FSMC_A17/TIM4_CH1 / USART3_RTS/ EVENTOUT

 

PD13

-

-

-

60

82

60

60

82

82

M15

101

M15

101

I/O

FT

 

FSMC_A18/TIM4_CH2/ EVENTOUT

 

VSS

-

-

-

-

83

-

-

83

83

-

102

-

102

S

 

 

 

 

VDD

-

-

-

-

84

-

-

84

84

J13

103

J13

103

S

 

 

 

 

PD14

-

F2

F2

61

85

61

61

85

85

M14

104

M14

104

I/O

FT

 

FSMC_D0/TIM4_CH3/ EVENTOUT/ EVENTOUT

 

PD15

-

F1

F1

62

86

62

62

86

86

L14

105

L14

105

I/O

FT

 

FSMC_D1/TIM4_CH4/ EVENTOUT

 

PG2

-

-

-

-

87

-

-

87

87

L15

106

L15

106

I/O

FT

 

FSMC_A12/ EVENTOUT

 

PG3

-

-

-

-

88

-

-

88

88

K15

107

K15

107

I/O

FT

 

FSMC_A13/ EVENTOUT

 

PG4

-

-

-

-

89

-

-

89

89

K14

108

K14

108

I/O

FT

 

FSMC_A14/ EVENTOUT

 

PG5

-

-

-

-

90

-

-

90

90

K13

109

K13

109

I/O

FT

 

FSMC_A15/ EVENTOUT

 

PG6

-

-

-

-

91

-

-

91

91

J15

110

J15

110

I/O

FT

 

FSMC_INT2/ EVENTOUT

 

PG7

-

-

-

-

92

-

-

92

92

J14

111

J14

111

I/O

FT

 

FSMC_INT3 /USART6_CK/ EVENTOUT

 

PG8

-

-

-

-

93

-

-

93

93

H14

112

H14

112

I/O

FT

 

USART6_RTS / ETH_PPS_OUT/ EVENTOUT

 

VSS

-

-

-

-

94

-

-

94

94

G12

113

G12

113

S

 

 

 

 

VDD

-

-

-

-

95

-

-

95

95

H13

114

H13

114

S

 

 

 

 

PC6

37

F3

F3

63

96

63

63

96

96

H15

115

H15

115

I/O

FT

 

I2S2_MCK / TIM8_CH1/SDIO_D6 / USART6_TX / DCMI_D0/TIM3_CH1/ EVENTOUT

 

PC7

38

E1

E1

64

97

64

64

97

97

G15

116

G15

116

I/O

FT

 

I2S3_MCK / TIM8_CH2/SDIO_D7 / USART6_RX / DCMI_D1/TIM3_CH2/ EVENTOUT

 

PC8

39

E2

E2

65

98

65

65

98

98

G14

117

G14

117

I/O

FT

 

TIM8_CH3/SDIO_D0 /TIM3_CH3/ USART6_CK / DCMI_D2/ EVENTOUT

 

PC9

40

E3

E3

66

99

66

66

99

99

F14

118

F14

118

I/O

FT

 

I2S_CKIN/ MCO2 / TIM8_CH4/SDIO_D1 / /I2C3_SDA / DCMI_D3 / TIM3_CH4/ EVENTOUT

 

PA8

41

D1

D1

67

100

67

67

100

100

F15

119

F15

119

I/O

FT

 

MCO1 / USART1_CK/ TIM1_CH1/ I2C3_SCL/ OTG_FS_SOF/ EVENTOUT

 

PA9

42

D2

D2

68

101

68

68

101

101

E15

120

E15

120

I/O

FT

 

USART1_TX/ TIM1_CH2 / I2C3_SMBA / DCMI_D0/ EVENTOUT

OTG_FS_VBUS

PA10

43

D3

D3

69

102

69

69

102

102

D15

121

D15

121

I/O

FT

 

USART1_RX/ TIM1_CH3/ OTG_FS_ID/DCMI_D1/ EVENTOUT

 

PA11

44

C1

C1

70

103

70

70

103

103

C15

122

C15

122

I/O

FT

 

USART1_CTS / CAN1_RX / TIM1_CH4 / OTG_FS_DM/ EVENTOUT

 

PA12

45

C2

C2

71

104

71

71

104

104

B15

123

B15

123

I/O

FT

 

USART1_RTS / CAN1_TX/ TIM1_ETR/ OTG_FS_DP/ EVENTOUT

 

PA13 (JTMS-SWDIO)

46

F8

F8

72

105

72

72

105

105

A15

124

A15

124

I/O

FT

 

JTMS-SWDIO/ EVENTOUT

 

VCAP_2

47

B1

B1

73

106

73

73

106

106

F13

125

F13

125

S

 

 

 

 

VSS

-

E7

E7

74

107

74

74

107

107

F12

126

F12

126

S

 

 

 

 

VDD

48

E6

E6

75

108

75

75

108

108

G13

127

G13

127

S

 

 

 

 

PH13

-

-

-

-

-

-

-

-

-

E12

128

E12

128

I/O

FT

 

TIM8_CH1N / CAN1_TX/ EVENTOUT

 

PH14

-

-

-

-

-

-

-

-

-

E13

129

E13

129

I/O

FT

 

TIM8_CH2N / DCMI_D4/ EVENTOUT

 

PH15

-

-

-

-

-

-

-

-

-

D13

130

D13

130

I/O

FT

 

TIM8_CH3N / DCMI_D11/ EVENTOUT

 

PI0

-

C3

C3

-

-

-

-

-

-

E14

131

E14

131

I/O

FT

 

TIM5_CH4 / SPI2_NSS / I2S2_WS / DCMI_D13/ EVENTOUT

 

PI1

-

B2

B2

-

-

-

-

-

-

D14

132

D14

132

I/O

FT

 

SPI2_SCK / I2S2_CK / DCMI_D8/ EVENTOUT

 

PI2

-

-

-

-

-

-

-

-

-

C14

133

C14

133

I/O

FT

 

TIM8_CH4 /SPI2_MISO / DCMI_D9 / I2S2ext_SD/ EVENTOUT

 

PI3

-

-

-

-

-

-

-

-

-

C13

134

C13

134

I/O

FT

 

TIM8_ETR / SPI2_MOSI / I2S2_SD / DCMI_D10/ EVENTOUT

 

VSS

-

-

-

-

-

-

-

-

-

D9

135

D9

135

S

 

 

 

 

VDD

-

-

-

-

-

-

-

-

-

C9

136

C9

136

S

 

 

 

 

PA14 (JTCK-SWCLK)

49

A2

A2

76

109

76

76

109

109

A14

137

A14

137

I/O

FT

 

JTCK-SWCLK/ EVENTOUT

 

PA15 (JTDI)

50

B3

B3

77

110

77

77

110

110

A13

138

A13

138

I/O

FT

 

JTDI/ SPI3_NSS/ I2S3_WS/TIM2_CH1_ETR / SPI1_NSS / EVENTOUT

 

PC10

51

D5

D5

78

111

78

78

111

111

B14

139

B14

139

I/O

FT

 

SPI3_SCK / I2S3_CK/ UART4_TX/SDIO_D2 / DCMI_D8 / USART3_TX/ EVENTOUT

 

PC11

52

C4

C4

79

112

79

79

112

112

B13

140

B13

140

I/O

FT

 

UART4_RX/ SPI3_MISO / SDIO_D3 / DCMI_D4/USART3_RX / I2S3ext_SD/ EVENTOUT

 

PC12

53

A3

A3

80

113

80

80

113

113

A12

141

A12

141

I/O

FT

 

UART5_TX/SDIO_CK / DCMI_D9 / SPI3_MOSI /I2S3_SD / USART3_CK/ EVENTOUT

 

PD0

-

D6

D6

81

114

81

81

114

114

B12

142

B12

142

I/O

FT

 

FSMC_D2/CAN1_RX/ EVENTOUT

 

PD1

-

C5

C5

82

115

82

82

115

115

C12

143

C12

143

I/O

FT

 

FSMC_D3 / CAN1_TX/ EVENTOUT

 

PD2

54

B4

B4

83

116

83

83

116

116

D12

144

D12

144

I/O

FT

 

TIM3_ETR/UART5_RX/ SDIO_CMD / DCMI_D11/ EVENTOUT

 

PD3

-

-

-

84

117

84

84

117

117

D11

145

D11

145

I/O

FT

 

FSMC_CLK/USART2_CTS / EVENTOUT

 

PD4

-

A4

A4

85

118

85

85

118

118

D10

146

D10

146

I/O

FT

 

FSMC_NOE/USART2_RTS / EVENTOUT

 

PD5

-

C6

C6

86

119

86

86

119

119

C11

147

C11

147

I/O

FT

 

FSMC_NWE/USART2_TX/ EVENTOUT

 

VSS

-

-

-

-

120

-

-

120

120

D8

148

D8

148

S

 

 

 

 

VDD

-

-

-

-

121

-

-

121

121

C8

149

C8

149

S

 

 

 

 

PD6

-

B5

B5

87

122

87

87

122

122

B11

150

B11

150

I/O

FT

 

FSMC_NWAIT/ USART2_RX/ EVENTOUT

 

PD7

-

A5

A5

88

123

88

88

123

123

A11

151

A11

151

I/O

FT

 

USART2_CK/FSMC_NE1/ FSMC_NCE2/ EVENTOUT

 

PG9

-

-

-

-

124

-

-

124

124

C10

152

C10

152

I/O

FT

 

USART6_RX / FSMC_NE2/FSMC_NCE3/ EVENTOUT

 

PG10

-

-

-

-

125

-

-

125

125

B10

153

B10

153

I/O

FT

 

FSMC_NCE4_1/ FSMC_NE3/ EVENTOUT

 

PG11

-

-

-

-

126

-

-

126

126

B9

154

B9

154

I/O

FT

 

FSMC_NCE4_2 / ETH_MII_TX_EN/ ETH _RMII_TX_EN/ EVENTOUT

 

PG12

-

-

-

-

127

-

-

127

127

B8

155

B8

155

I/O

FT

 

FSMC_NE4 / USART6_RTS/ EVENTOUT

 

PG13

-

-

-

-

128

-

-

128

128

A8

156

A8

156

I/O

FT

 

FSMC_A24 / USART6_CTS /ETH_MII_TXD0/ ETH_RMII_TXD0/ EVENTOUT

 

PG14

-

-

-

-

129

-

-

129

129

A7

157

A7

157

I/O

FT

 

FSMC_A25 / USART6_TX /ETH_MII_TXD1/ ETH_RMII_TXD1/ EVENTOUT

 

VSS

-

E8

E8

-

130

-

-

130

130

D7

158

D7

158

S

 

 

 

 

VDD

-

F7

F7

-

131

-

-

131

131

C7

159

C7

159

S

 

 

 

 

PG15

-

-

-

-

132

-

-

132

132

B7

160

B7

160

I/O

FT

 

USART6_CTS / DCMI_D13/ EVENTOUT

 

PB3 (JTDO/ TRACESWO)

55

B6

B6

89

133

89

89

133

133

A10

161

A10

161

I/O

FT

 

JTDO/ TRACESWO/ SPI3_SCK / I2S3_CK / TIM2_CH2 / SPI1_SCK/ EVENTOUT

 

PB4 (NJTRST)

56

A6

A6

90

134

90

90

134

134

A9

162

A9

162

I/O

FT

 

NJTRST/ SPI3_MISO / TIM3_CH1 / SPI1_MISO / I2S3ext_SD/ EVENTOUT

 

PB5

57

D7

D7

91

135

91

91

135

135

A6

163

A6

163

I/O

FT

 

I2C1_SMBA/ CAN2_RX / OTG_HS_ULPI_D7 / ETH_PPS_OUT/TIM3_CH 2 / SPI1_MOSI/ SPI3_MOSI / DCMI_D10 / I2S3_SD/ EVENTOUT

 

PB6

58

C7

C7

92

136

92

92

136

136

B6

164

B6

164

I/O

FT

 

I2C1_SCL/ TIM4_CH1 / CAN2_TX / DCMI_D5/USART1_TX/ EVENTOUT

 

PB7

59

B7

B7

93

137

93

93

137

137

B5

165

B5

165

I/O

FT

 

I2C1_SDA / FSMC_NL / DCMI_VSYNC / USART1_RX/ TIM4_CH2/ EVENTOUT

 

BOOT0

60

A7

A7

94

138

94

94

138

138

D6

166

D6

166

I

B

 

 

VPP

PB8

61

D8

D8

95

139

95

95

139

139

A5

167

A5

167

I/O

FT

 

TIM4_CH3/SDIO_D4/ TIM10_CH1 / DCMI_D6 / ETH_MII_TXD3 / I2C1_SCL/ CAN1_RX/ EVENTOUT

 

PB9

62

C8

C8

96

140

96

96

140

140

B4

168

B4

168

I/O

FT

 

SPI2_NSS/ I2S2_WS/TIM4_CH4/ TIM11_CH1/ SDIO_D5 / DCMI_D7 / I2C1_SDA / CAN1_TX/ EVENTOUT

 

PE0

-

-

-

97

141

97

97

141

141

A4

169

A4

169

I/O

FT

 

TIM4_ETR / FSMC_NBL0 / DCMI_D2/ EVENTOUT

 

PE1

-

-

-

98

142

98

98

142

142

A3

170

A3

170

I/O

FT

 

FSMC_NBL1 / DCMI_D3/ EVENTOUT

 

VSS

63

-

-

99

-

99

99

-

-

D5

-

D5

-

S

 

 

 

 

PDR_ON

-

A8

A8

-

143

-

-

143

143

C6

171

C6

171

I

FT

 

 

 

VDD

64

A1

A1

100

144

100

100

144

144

C5

172

C5

172

S

 

 

 

 

PI4

-

-

-

-

-

-

-

-

-

D4

173

D4

173

I/O

FT

 

TIM8_BKIN / DCMI_D5/ EVENTOUT

 

PI5

-

-

-

-

-

-

-

-

-

C4

174

C4

174

I/O

FT

 

TIM8_CH1 / DCMI_VSYNC/ EVENTOUT

 

PI6

-

-

-

-

-

-

-

-

-

C3

175

C3

175

I/O

FT

 

TIM8_CH2 / DCMI_D6/ EVENTOUT

 

PI7

-

-

-

-

-

-

-

-

-

C2

176

C2

176

I/O

FT

 

TIM8_CH3 / DCMI_D7/ EVENTOUT

 

1. Function availability depends on the chosen device.
2. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only skins a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited:
- The Speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the
4. FT = 5 V tolerant except when in analog mode or iscillator mode (for PC14, PC15, PH0 and PH1).

source : STM32F405xxSTM32F407xx Datasheet (DOC ID 022152 Rev 3)

 

 

STM32F415xx - STM32F417xx

Pin name

(function after reset)(1)

01_STM32F415RG_name

02_STM32F415OG_name

03_STM32F415VG_name

04_STM32F415ZG_name

05_STM32F417VE_name

06_STM32F417VG_name

07_STM32F417ZE_name

08_STM32F417ZG_name

09_STM32F417IE_name

10_STM32F417IE_name

11_STM32F417IG_name

12_STM32F417IG_name

Pin

type

I / O

structure

Notes

Alternate

functions

Additional

functions

PE2

-

-

1

1

1

1

1

1

A2

1

A2

1

I/O

FT

 

TRACECLK/ FSMC_A23 / ETH_MII_TXD3 / EVENTOUT

 

PE3

-

-

2

2

2

2

2

2

A1

2

A1

2

I/O

FT

 

TRACED0/FSMC_A19 / EVENTOUT

 

PE4

-

-

3

3

3

3

3

3

B1

3

B1

3

I/O

FT

 

TRACED1/FSMC_A20 / DCMI_D4/ EVENTOUT

 

PE5

-

-

4

4

4

4

4

4

B2

4

B2

4

I/O

FT

 

TRACED2 / FSMC_A21 / TIM9_CH1 / DCMI_D6 / EVENTOUT

 

PE6

-

-

5

5

5

5

5

5

B3

5

B3

5

I/O

FT

 

TRACED3 / FSMC_A22 / TIM9_CH2 / DCMI_D7 / EVENTOUT

 

VBAT

1

A10

6

6

6

6

6

6

C1

6

C1

6

S

 

 

 

 

PI8

-

-

-

-

-

-

-

-

D2

7

D2

7

I/O

FT

(2)(3)

EVENTOUT

RTC_AF2

PC13

2

A9

7

7

7

7

7

7

D1

8

D1

8

I/O

FT

(2)(3)

EVENTOUT

RTC_AF1

PC14-OSC32_IN (PC14)

3

B10

8

8

8

8

8

8

E1

9

E1

9

I/O

FT

(2)(3)

EVENTOUT

OSC32_IN(4)

PC15­OSC32_OUT (PC15)

4

B9

9

9

9

9

9

9

F1

10

F1

10

I/O

FT

(2)(3)

EVENTOUT

OSC32_OUT(4)

PI9

-

-

-

-

-

-

-

-

D3

11

D3

11

I/O

FT

 

CAN1_RX / EVENTOUT

 

PI10

-

-

-

-

-

-

-

-

E3

12

E3

12

I/O

FT

 

ETH_MII_RX_ER / EVENTOUT

 

PI11

-

-

-

-

-

-

-

-

E4

13

E4

13

I/O

FT

 

OTG_HS_ULPI_DIR / EVENTOUT

 

VSS

-

-

-

-

-

-

-

-

F2

14

F2

14

S

 

 

 

 

VDD

-

-

-

-

-

-

-

-

F3

15

F3

15

S

 

 

 

 

PF0

-

-

-

10

-

-

10

10

E2

16

E2

16

I/O

FT

 

FSMC_A0 / I2C2_SDA / EVENTOUT

 

PF1

-

-

-

11

-

-

11

11

H3

17

H3

17

I/O

FT

 

FSMC_A1 / I2C2_SCL / EVENTOUT

 

PF2

-

-

-

12

-

-

12

12

H2

18

H2

18

I/O

FT

 

FSMC_A2 / I2C2_SMBA / EVENTOUT

 

PF3

-

-

-

13

-

-

13

13

J2

19

J2

19

I/O

FT

(4)

FSMC_A3/EVENTOUT

ADC3_IN9

PF4

-

-

-

14

-

-

14

14

J3

20

J3

20

I/O

FT

(4)

FSMC_A4/EVENTOUT

ADC3_IN14

PF5

-

-

-

15

-

-

15

15

K3

21

K3

21

I/O

FT

(4)

FSMC_A5/EVENTOUT

ADC3_IN15

VSS

-

C9

10

16

10

10

16

16

G2

22

G2

22

S

 

 

 

 

VDD

-

B8

11

17

11

11

17

17

G3

23

G3

23

S

 

 

 

 

PF6

-

-

-

18

-

-

18

18

K2

24

K2

24

I/O

FT

(4)

TIM10_CH1 / FSMC_NIORD/ EVENTOUT

ADC3_IN4

PF7

-

-

-

19

-

-

19

19

K1

25

K1

25

I/O

FT

(4)

TIM11_CH1/FSMC_NREG/ EVENTOUT

ADC3_IN5

PF8

-

-

-

20

-

-

20

20

L3

26

L3

26

I/O

FT

(4)

TIM13_CH1 / FSMC_NIOWR/ EVENTOUT

ADC3_IN6

PF9

-

-

-

21

-

-

21

21

L2

27

L2

27

I/O

FT

(4)

TIM14_CH1 / FSMC_CD/ EVENTOUT

ADC3_IN7

PF10

-

-

-

22

-

-

22

22

L1

28

L1

28

I/O

FT

(4)

FSMC_INTR/ EVENTOUT

ADC3_IN8

PH0-OSC_IN (PH0)

5

F10

12

23

12

12

23

23

G1

29

G1

29

I/O

FT

 

EVENTOUT

OSC_IN(4)

PH1-OSC_OUT (PH1)

6

F9

13

24

13

13

24

24

H1

30

H1

30

I/O

FT

 

EVENTOUT

OSC_OUT(4)

NRST

7

G10

14

25

14

14

25

25

J1

31

J1

31

I/O

RST

 

 

 

PC0

8

E10

15

26

15

15

26

26

M2

32

M2

32

I/O

FT

(4)

OTG_HS_ULPI_STP/ EVENTOUT

ADC123_IN10

PC1

9

-

16

27

16

16

27

27

M3

33

M3

33

I/O

FT

(4)

ETH_MDC/ EVENTOUT

ADC123_IN11

PC2

10

D10

17

28

17

17

28

28

M4

34

M4

34

I/O

FT

(4)

SPI2_MISO / OTG_HS_ULPI_DIR / TH_MII_TXD2 /I2S2ext_SD/ EVENTOUT

ADC123_IN12

PC3

11

E9

18

29

18

18

29

29

M5

35

M5

35

I/O

FT

(4)

SPI2_MOSI / I2S2_SD / OTG_HS_ULPI_NXT / ETH_MII_TX_CLK/EVENTOUT

ADC123_IN13

VDD

-

-

19

30

19

19

30

30

G3

36

G3

36

S

 

 

 

 

VSSA

12

H10

20

31

20

20

31

31

M1

37

M1

37

S

 

 

 

 

VREF–

-

-

-

-

-

-

-

-

N1

-

N1

-

S

 

 

 

 

VREF+

-

-

21

32

21

21

32

32

P1

38

P1

38

S

 

 

 

 

VDDA

13

G9

22

33

22

22

33

33

R1

39

R1

39

S

 

 

 

 

PA0-WKUP (PA0)

14

C10

23

34

23

23

34

34

N3

40

N3

40

I/O

FT

(5)

USART2_CTS/ UART4_TX/ ETH_MII_CRS / TIM2_CH1_ETR/ TIM5_CH1 / TIM8_ETR/ EVENTOUT

ADC123_IN0/WKUP(4)

PA1

15

F8

24

35

24

24

35

35

N2

41

N2

41

I/O

FT

(4)

USART2_RTS / UART4_RX/ ETH_RMII_REF_CLK / ETH_MII_RX_CLK / TIM5_CH2 / TIMM2_CH2/ EVENTOUT

ADC123_IN1

PA2

16

J10

25

36

25

25

36

36

P2

42

P2

42

I/O

FT

(4)

USART2_TX/TIM5_CH3 / TIM9_CH1 / TIM2_CH3 / ETH_MDIO/ EVENTOUT

ADC123_IN2

PH2

-

-

-

-

-

-

-

-

F4

43

F4

43

I/O

FT

 

ETH_MII_CRS/EVENTOUT

 

PH3

-

-

-

-

-

-

-

-

G4

44

G4

44

I/O

FT

 

ETH_MII_COL/EVENTOUT

 

PH4

-

-

-

-

-

-

-

-

H4

45

H4

45

I/O

FT

 

I2C2_SCL / OTG_HS_ULPI_NXT/ EVENTOUT

 

PH5

-

-

-

-

-

-

-

-

J4

46

J4

46

I/O

FT

 

I2C2_SDA/ EVENTOUT

 

PA3

17

H9

26

37

26

26

37

37

R2

47

R2

47

I/O

FT

(4)

USART2_RX/TIM5_CH4 / TIM9_CH2 / TIM2_CH4 / OTG_HS_ULPI_D0 / ETH_MII_COL/ EVENTOUT

ADC123_IN3

VSS

18

E5

27

38

27

27

38

38

-

48

-

48

S

 

 

 

 

BYPASS_REG

 

D9

 

 

 

 

 

 

L4

-

L4

-

I

FT

 

 

 

VDD

19

E4

28

39

28

28

39

39

K4

49

K4

49

S

 

 

 

 

PA4

20

J9

29

40

29

29

40

40

N4

50

N4

50

I/O

TC

(4)

SPI1_NSS / SPI3_NSS / USART2_CK / DCMI_HSYNC / OTG_HS_SOF/ I2S3_WS/ EVENTOUT

ADC12_IN4 /DAC1_OUT

PA5

21

G8

30

41

30

30

41

41

P4

51

P4

51

I/O

TC

(4)

SPI1_SCK/ OTG_HS_ULPI_CK / TIM2_CH1_ETR/ TIM8_CHIN/ EVENTOUT

ADC12_IN5/DAC2_OU T

PA6

22

H8

31

42

31

31

42

42

P3

52

P3

52

I/O

FT

(4)

SPI1_MISO / TIM8_BKIN/TIM13_CH1 / DCMI_PIXCLK / TIM3_CH1 / TIM1_BKIN/EVENTOUT

ADC12_IN6

PA7

23

J8

32

43

32

32

43

43

R3

53

R3

53

I/O

FT

(4)

SPI1_MOSI/ TIM8_CH1N / TIM14_CH1/TIM3_CH2/ ETH_MII_RX_DV / TIM1_CH1N / RMII_CRS_DV/ EVENTOUT

ADC12_IN7

PC4

24

-

33

44

33

33

44

44

N5

54

N5

54

I/O

FT

(4)

ETH_RMII_RX_D0 / ETH_MII_RX_D0/ EVENTOUT

ADC12_IN14

PC5

25

-

34

45

34

34

45

45

P5

55

P5

55

I/O

FT

(4)

ETH_RMII_RX_D1 / ETH_MII_RX_D1/ EVENTOUT

ADC12_IN15

PB0

26

G7

35

46

35

35

46

46

R5

56

R5

56

I/O

FT

(4)

TIM3_CH3 / TIM8_CH2N/ OTG_HS_ULPI_D1/ ETH_MII_RXD2 / TIM1_CH2N/ EVENTOUT

ADC12_IN8

PB1

27

H7

36

47

36

36

47

47

R4

57

R4

57

I/O

FT

(4)

TIM3_CH4 / TIM8_CH3N/ OTG_HS_ULPI_D2/ ETH_MII_RXD3 / TIM1_CH3N/ EVENTOUT

ADC12_IN9

PB2-BOOT1 (PB2)

28

J7

37

48

37

37

48

48

M6

58

M6

58

I/O

FT

 

EVENTOUT

 

PF11

-

-

-

49

-

-

49

49

R6

59

R6

59

I/O

FT

 

DCMI_12/ EVENTOUT

 

PF12

-

-

-

50

-

-

50

50

P6

60

P6

60

I/O

FT

 

FSMC_A6/ EVENTOUT

 

VSS

-

-

-

51

-

-

51

51

M8

61

M8

61

S

 

 

 

 

VDD

-

-

-

52

-

-

52

52

N8

62

N8

62

S

 

 

 

 

PF13

-

-

-

53

-

-

53

53

N6

63

N6

63

I/O

FT

 

FSMC_A7/ EVENTOUT

 

PF14

-

-

-

54

-

-

54

54

R7

64

R7

64

I/O

FT

 

FSMC_A8/ EVENTOUT

 

PF15

-

-

-

55

-

-

55

55

P7

65

P7

65

I/O

FT

 

FSMC_A9/ EVENTOUT

 

PG0

-

-

-

56

-

-

56

56

N7

66

N7

66

I/O

FT

 

FSMC_A10/ EVENTOUT

 

PG1

-

-

-

57

-

-

57

57

M7

67

M7

67

I/O

FT

 

FSMC_A11/ EVENTOUT

 

PE7

-

G6

38

58

38

38

58

58

R8

68

R8

68

I/O

FT

 

FSMC_D4/TIM1_ETR/ EVENTOUT

 

PE8

-

H6

39

59

39

39

59

59

P8

69

P8

69

I/O

FT

 

FSMC_D5/ TIM1_CH1N/ EVENTOUT

 

PE9

-

J6

40

60

40

40

60

60

P9

70

P9

70

I/O

FT

 

FSMC_D6/TIM1_CH1/ EVENTOUT

 

VSS

-

-

-

61

-

-

61

61

M9

71

M9

71

S

 

 

 

 

VDD

-

-

-

62

-

-

62

62

N9

72

N9

72

S

 

 

 

 

PE10

-

F6

41

63

41

41

63

63

R9

73

R9

73

I/O

FT

 

FSMC_D7/TIM1_CH2N/ EVENTOUT

 

PE11

-

J5

42

64

42

42

64

64

P10

74

P10

74

I/O

FT

 

FSMC_D8/TIM1_CH2/ EVENTOUT

 

PE12

-

H5

43

65

43

43

65

65

R10

75

R10

75

I/O

FT

 

FSMC_D9/TIM1_CH3N/ EVENTOUT

 

PE13

-

G5

44

66

44

44

66

66

N11

76

N11

76

I/O

FT

 

FSMC_D10/TIM1_CH3/ EVENTOUT

 

PE14

-

F5

45

67

45

45

67

67

P11

77

P11

77

I/O

FT

 

FSMC_D11/TIM1_CH4/ EVENTOUT

 

PE15

-

G4

46

68

46

46

68

68

R11

78

R11

78

I/O

FT

 

FSMC_D12/TIM1_BKIN/ EVENTOUT

 

PB10

29

H4

47

69

47

47

69

69

R12

79

R12

79

I/O

FT

 

SPI2_SCK / I2S2_CK / I2C2_SCL/ USART3_TX / OTG_HS_ULPI_D3 / ETH_MII_RX_ER / TIM2_CH3/ EVENTOUT

 

PB11

30

J4

48

70

48

48

70

70

R13

80

R13

80

I/O

FT

 

I2C2_SDA/USART3_RX/ OTG_HS_ULPI_D4 / ETH_RMII_TX_EN/ ETH_MII_TX_EN / TIM2_CH4/ EVENTOUT

 

VCAP_1

31

F4

49

71

49

49

71

71

M10

81

M10

81

S

 

 

 

 

VDD

32

-

50

72

50

50

72

72

N10

82

N10

82

S

 

 

 

 

PH6

-

-

-

-

-

-

-

-

M11

83

M11

83

I/O

FT

 

I2C2_SMBA / TIM12_CH1 / ETH_MII_RXD2/ EVENTOUT

 

PH7

-

-

-

-

-

-

-

-

N12

84

N12

84

I/O

FT

 

I2C3_SCL / ETH_MII_RXD3/ EVENTOUT

 

PH8

-

-

-

-

-

-

-

-

M12

85

M12

85

I/O

FT

 

I2C3_SDA / DCMI_HSYNC/ EVENTOUT

 

PH9

-

-

-

-

-

-

-

-

M13

86

M13

86

I/O

FT

 

I2C3_SMBA / TIM12_CH2/ DCMI_D0/ EVENTOUT

 

PH10

-

-

-

-

-

-

-

-

L13

87

L13

87

I/O

FT

 

TIM5_CH1 / DCMI_D1/ EVENTOUT

 

PH11

-

-

-

-

-

-

-

-

L12

88

L12

88

I/O

FT

 

TIM5_CH2 / DCMI_D2/ EVENTOUT

 

PH12

-

-

-

-

-

-

-

-

K12

89

K12

89

I/O

FT

 

TIM5_CH3 / DCMI_D3/ EVENTOUT

 

VSS

-

-

-

-

-

-

-

-

H12

90

H12

90

S

 

 

 

 

VDD

-

-

-

-

-

-

-

-

J12

91

J12

91

S

 

 

 

 

PB12

33

J3

51

73

51

51

73

73

P12

92

P12

92

I/O

FT

 

SPI2_NSS / I2S2_WS / I2C2_SMBA/ USART3_CK/ TIM1_BKIN / CAN2_RX / OTG_HS_ULPI_D5/ ETH_RMII_TXD0 / ETH_MII_TXD0/ OTG_HS_ID/ EVENTOUT

 

PB13

34

J1

52

74

52

52

74

74

P13

93

P13

93

I/O

FT

 

SPI2_SCK / I2S2_CK / USART3_CTS/ TIM1_CH1N /CAN2_TX / OTG_HS_ULPI_D6 / ETH_RMII_TXD1 / ETH_MII_TXD1/ EVENTOUT

OTG_HS_VBUS

PB14

35

J2

53

75

53

53

75

75

R14

94

R14

94

I/O

FT

 

SPI2_MISO/ TIM1_CH2N / TIM12_CH1 / OTG_HS_DM/ USART3_RTS / TIM8_CH2N/I2S2ext_SD/ EVENTOUT

 

PB15

36

H1

54

76

54

54

76

76

R15

95

R15

95

I/O

FT

 

SPI2_MOSI / I2S2_SD/ TIM1_CH3N / TIM8_CH3N / TIM12_CH2 / OTG_HS_DP/ EVENTOUT

 

PD8

-

H2

55

77

55

55

77

77

P15

96

P15

96

I/O

FT

 

FSMC_D13 / USART3_TX/ EVENTOUT

 

PD9

-

H3

56

78

56

56

78

78

P14

97

P14

97

I/O

FT

 

FSMC_D14 / USART3_RX/ EVENTOUT

 

PD10

-

G3

57

79

57

57

79

79

N15

98

N15

98

I/O

FT

 

FSMC_D15 / USART3_CK/ EVENTOUT

 

PD11

-

G1

58

80

58

58

80

80

N14

99

N14

99

I/O

FT

 

FSMC_CLE / FSMC_A16/USART3_CTS/ EVENTOUT

 

PD12

-

G2

59

81

59

59

81

81

N13

100

N13

100

I/O

FT

 

FSMC_ALE/ FSMC_A17/TIM4_CH1 / USART3_RTS/ EVENTOUT

 

PD13

-

-

60

82

60

60

82

82

M15

101

M15

101

I/O

FT

 

FSMC_A18/TIM4_CH2/ EVENTOUT

 

VSS

-

-

-

83

-

-

83

83

-

102

-

102

S

 

 

 

 

VDD

-

-

-

84

-

-

84

84

J13

103

J13

103

S

 

 

 

 

PD14

-

F2

61

85

61

61

85

85

M14

104

M14

104

I/O

FT

 

FSMC_D0/TIM4_CH3/ EVENTOUT/ EVENTOUT

 

PD15

-

F1

62

86

62

62

86

86

L14

105

L14

105

I/O

FT

 

FSMC_D1/TIM4_CH4/ EVENTOUT

 

PG2

-

-

-

87

-

-

87

87

L15

106

L15

106

I/O

FT

 

FSMC_A12/ EVENTOUT

 

PG3

-

-

-

88

-

-

88

88

K15

107

K15

107

I/O

FT

 

FSMC_A13/ EVENTOUT

 

PG4

-

-

-

89

-

-

89

89

K14

108

K14

108

I/O

FT

 

FSMC_A14/ EVENTOUT

 

PG5

-

-

-

90

-

-

90

90

K13

109

K13

109

I/O

FT

 

FSMC_A15/ EVENTOUT

 

PG6

-

-

-

91

-

-

91

91

J15

110

J15

110

I/O

FT

 

FSMC_INT2/ EVENTOUT

 

PG7

-

-

-

92

-

-

92

92

J14

111

J14

111

I/O

FT

 

FSMC_INT3 /USART6_CK/ EVENTOUT

 

PG8

-

-

-

93

-

-

93

93

H14

112

H14

112

I/O

FT

 

USART6_RTS / ETH_PPS_OUT/ EVENTOUT

 

VSS

-

-

-

94

-

-

94

94

G12

113

G12

113

S

 

 

 

 

VDD

-

-

-

95

-

-

95

95

H13

114

H13

114

S

 

 

 

 

PC6

37

F3

63

96

63

63

96

96

H15

115

H15

115

I/O

FT

 

I2S2_MCK / TIM8_CH1/SDIO_D6 / USART6_TX / DCMI_D0/TIM3_CH1/ EVENTOUT

 

PC7

38

E1

64

97

64

64

97

97

G15

116

G15

116

I/O

FT

 

I2S3_MCK / TIM8_CH2/SDIO_D7 / USART6_RX / DCMI_D1/TIM3_CH2/ EVENTOUT

 

PC8

39

E2

65

98

65

65

98

98

G14

117

G14

117

I/O

FT

 

TIM8_CH3/SDIO_D0 /TIM3_CH3/ USART6_CK / DCMI_D2/ EVENTOUT

 

PC9

40

E3

66

99

66

66

99

99

F14

118

F14

118

I/O

FT

 

I2S_CKIN/ MCO2 / TIM8_CH4/SDIO_D1 / /I2C3_SDA / DCMI_D3 / TIM3_CH4/ EVENTOUT

 

PA8

41

D1

67

100

67

67

100

100

F15

119

F15

119

I/O

FT

 

MCO1 / USART1_CK/ TIM1_CH1/ I2C3_SCL/ OTG_FS_SOF/ EVENTOUT

 

PA9

42

D2

68

101

68

68

101

101

E15

120

E15

120

I/O

FT

 

USART1_TX/ TIM1_CH2 / I2C3_SMBA / DCMI_D0/ EVENTOUT

OTG_FS_VBUS

PA10

43

D3

69

102

69

69

102

102

D15

121

D15

121

I/O

FT

 

USART1_RX/ TIM1_CH3/ OTG_FS_ID/DCMI_D1/ EVENTOUT

 

PA11

44

C1

70

103

70

70

103

103

C15

122

C15

122

I/O

FT

 

USART1_CTS / CAN1_RX / TIM1_CH4 / OTG_FS_DM/ EVENTOUT

 

PA12

45

C2

71

104

71

71

104

104

B15

123

B15

123

I/O

FT

 

USART1_RTS / CAN1_TX/ TIM1_ETR/ OTG_FS_DP/ EVENTOUT

 

PA13 (JTMS-SWDIO)

46

F8

72

105

72

72

105

105

A15

124

A15

124

I/O

FT

 

JTMS-SWDIO/ EVENTOUT

 

VCAP_2

47

B1

73

106

73

73

106

106

F13

125

F13

125

S

 

 

 

 

VSS

-

E7

74

107

74

74

107

107

F12

126

F12

126

S

 

 

 

 

VDD

48

E6

75

108

75

75

108

108

G13

127

G13

127

S

 

 

 

 

PH13

-

-

-

-

-

-

-

-

E12

128

E12

128

I/O

FT

 

TIM8_CH1N / CAN1_TX/ EVENTOUT

 

PH14

-

-

-

-

-

-

-

-

E13

129

E13

129

I/O

FT

 

TIM8_CH2N / DCMI_D4/ EVENTOUT

 

PH15

-

-

-

-

-

-

-

-

D13

130

D13

130

I/O

FT

 

TIM8_CH3N / DCMI_D11/ EVENTOUT

 

PI0

-

C3

-

-

-

-

-

-

E14

131

E14

131

I/O

FT

 

TIM5_CH4 / SPI2_NSS / I2S2_WS / DCMI_D13/ EVENTOUT

 

PI1

-

B2

-

-

-

-

-

-

D14

132

D14

132

I/O

FT

 

SPI2_SCK / I2S2_CK / DCMI_D8/ EVENTOUT

 

PI2

-

-

-

-

-

-

-

-

C14

133

C14

133

I/O

FT

 

TIM8_CH4 /SPI2_MISO / DCMI_D9 / I2S2ext_SD/ EVENTOUT

 

PI3

-

-

-

-

-

-

-

-

C13

134

C13

134

I/O

FT

 

TIM8_ETR / SPI2_MOSI / I2S2_SD / DCMI_D10/ EVENTOUT

 

VSS

-

-

-

-

-

-

-

-

D9

135

D9

135

S

 

 

 

 

VDD

-

-

-

-

-

-

-

-

C9

136

C9

136

S

 

 

 

 

PA14 (JTCK-SWCLK)

49

A2

76

109

76

76

109

109

A14

137

A14

137

I/O

FT

 

JTCK-SWCLK/ EVENTOUT

 

PA15 (JTDI)

50

B3

77

110

77

77

110

110

A13

138

A13

138

I/O

FT

 

JTDI/ SPI3_NSS/ I2S3_WS/TIM2_CH1_ETR / SPI1_NSS / EVENTOUT

 

PC10

51

D5

78

111

78

78

111

111

B14

139

B14

139

I/O

FT

 

SPI3_SCK / I2S3_CK/ UART4_TX/SDIO_D2 / DCMI_D8 / USART3_TX/ EVENTOUT

 

PC11

52

C4

79

112

79

79

112

112

B13

140

B13

140

I/O

FT

 

UART4_RX/ SPI3_MISO / SDIO_D3 / DCMI_D4/USART3_RX / I2S3ext_SD/ EVENTOUT

 

PC12

53

A3

80

113

80

80

113

113

A12

141

A12

141

I/O

FT

 

UART5_TX/SDIO_CK / DCMI_D9 / SPI3_MOSI /I2S3_SD / USART3_CK/ EVENTOUT

 

PD0

-

D6

81

114

81

81

114

114

B12

142

B12

142

I/O

FT

 

FSMC_D2/CAN1_RX/ EVENTOUT

 

PD1

-

C5

82

115

82

82

115

115

C12

143

C12

143

I/O

FT

 

FSMC_D3 / CAN1_TX/ EVENTOUT

 

PD2

54

B4

83

116

83

83

116

116

D12

144

D12

144

I/O

FT

 

TIM3_ETR/UART5_RX/ SDIO_CMD / DCMI_D11/ EVENTOUT

 

PD3

-

-

84

117

84

84

117

117

D11

145

D11

145

I/O

FT

 

FSMC_CLK/USART2_CTS / EVENTOUT

 

PD4

-

A4

85

118

85

85

118

118

D10

146

D10

146

I/O

FT

 

FSMC_NOE/USART2_RTS / EVENTOUT

 

PD5

-

C6

86

119

86

86

119

119

C11

147

C11

147

I/O

FT

 

FSMC_NWE/USART2_TX/ EVENTOUT

 

VSS

-

-

-

120

-

-

120

120

D8

148

D8

148

S

 

 

 

 

VDD

-

-

-

121

-

-

121

121

C8

149

C8

149

S

 

 

 

 

PD6

-

B5

87

122

87

87

122

122

B11

150

B11

150

I/O

FT

 

FSMC_NWAIT/ USART2_RX/ EVENTOUT

 

PD7

-

A5

88

123

88

88

123

123

A11

151

A11

151

I/O

FT

 

USART2_CK/FSMC_NE1/ FSMC_NCE2/ EVENTOUT

 

PG9

-

-

-

124

-

-

124

124

C10

152

C10

152

I/O

FT

 

USART6_RX / FSMC_NE2/FSMC_NCE3/ EVENTOUT

 

PG10

-

-

-

125

-

-

125

125

B10

153

B10

153

I/O

FT

 

FSMC_NCE4_1/ FSMC_NE3/ EVENTOUT

 

PG11

-

-

-

126

-

-

126

126

B9

154

B9

154

I/O

FT

 

FSMC_NCE4_2 / ETH_MII_TX_EN/ ETH _RMII_TX_EN/ EVENTOUT

 

PG12

-

-

-

127

-

-

127

127

B8

155

B8

155

I/O

FT

 

FSMC_NE4 / USART6_RTS/ EVENTOUT

 

PG13

-

-

-

128

-

-

128

128

A8

156

A8

156

I/O

FT

 

FSMC_A24 / USART6_CTS /ETH_MII_TXD0/ ETH_RMII_TXD0/ EVENTOUT

 

PG14

-

-

-

129

-

-

129

129

A7

157

A7

157

I/O

FT

 

FSMC_A25 / USART6_TX /ETH_MII_TXD1/ ETH_RMII_TXD1/ EVENTOUT

 

VSS

-

E8

-

130

-

-

130

130

D7

158

D7

158

S

 

 

 

 

VDD

-

F7

-

131

-

-

131

131

C7

159

C7

159

S

 

 

 

 

PG15

-

-

-

132

-

-

132

132

B7

160

B7

160

I/O

FT

 

USART6_CTS / DCMI_D13/ EVENTOUT

 

PB3 (JTDO/ TRACESWO)

55

B6

89

133

89

89

133

133

A10

161

A10

161

I/O

FT

 

JTDO/ TRACESWO/ SPI3_SCK / I2S3_CK / TIM2_CH2 / SPI1_SCK/ EVENTOUT

 

PB4 (NJTRST)

56

A6

90

134

90

90

134

134

A9

162

A9

162

I/O

FT

 

NJTRST/ SPI3_MISO / TIM3_CH1 / SPI1_MISO / I2S3ext_SD/ EVENTOUT

 

PB5

57

D7

91

135

91

91

135

135

A6

163

A6

163

I/O

FT

 

I2C1_SMBA/ CAN2_RX / OTG_HS_ULPI_D7 / ETH_PPS_OUT/TIM3_CH 2 / SPI1_MOSI/ SPI3_MOSI / DCMI_D10 / I2S3_SD/ EVENTOUT

 

PB6

58

C7

92

136

92

92

136

136

B6

164

B6

164

I/O

FT

 

I2C1_SCL/ TIM4_CH1 / CAN2_TX / DCMI_D5/USART1_TX/ EVENTOUT

 

PB7

59

B7

93

137

93

93

137

137

B5

165

B5

165

I/O

FT

 

I2C1_SDA / FSMC_NL / DCMI_VSYNC / USART1_RX/ TIM4_CH2/ EVENTOUT

 

BOOT0

60

A7

94

138

94

94

138

138

D6

166

D6

166

I

B

 

 

VPP

PB8

61

D8

95

139

95

95

139

139

A5

167

A5

167

I/O

FT

 

TIM4_CH3/SDIO_D4/ TIM10_CH1 / DCMI_D6 / ETH_MII_TXD3 / I2C1_SCL/ CAN1_RX/ EVENTOUT

 

PB9

62

C8

96

140

96

96

140

140

B4

168

B4

168

I/O

FT

 

SPI2_NSS/ I2S2_WS/TIM4_CH4/ TIM11_CH1/ SDIO_D5 / DCMI_D7 / I2C1_SDA / CAN1_TX/ EVENTOUT

 

PE0

-

-

97

141

97

97

141

141

A4

169

A4

169

I/O

FT

 

TIM4_ETR / FSMC_NBL0 / DCMI_D2/ EVENTOUT

 

PE1

-

-

98

142

98

98

142

142

A3

170

A3

170

I/O

FT

 

FSMC_NBL1 / DCMI_D3/ EVENTOUT

 

VSS

63

-

99

-

99

99

-

-

D5

-

D5

-

S

 

 

 

 

PDR_ON

-

A8

-

143

-

-

143

143

C6

171

C6

171

I

FT

 

 

 

VDD

64

A1

100

144

100

100

144

144

C5

172

C5

172

S

 

 

 

 

PI4

-

-

-

-

-

-

-

-

D4

173

D4

173

I/O

FT

 

TIM8_BKIN / DCMI_D5/ EVENTOUT

 

PI5

-

-

-

-

-

-

-

-

C4

174

C4

174

I/O

FT

 

TIM8_CH1 / DCMI_VSYNC/ EVENTOUT

 

PI6

-

-

-

-

-

-

-

-

C3

175

C3

175

I/O

FT

 

TIM8_CH2 / DCMI_D6/ EVENTOUT

 

PI7

-

-

-

-

-

-

-

-

C2

176

C2

176

I/O

FT

 

TIM8_CH3 / DCMI_D7/ EVENTOUT

 

1. Function availability depends on the chosen device.
2. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only skins a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited:
- The Speed should not exceed 2 MHz with a maximum load of 30 pF.
- These I/Os must not be used as a current source (e.g. to drive an LED).
3. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the
4. FT = 5 V tolerant except when in analog mode or iscillator mode (for PC14, PC15, PH0 and PH1).

source : STM32F415xxSTM32F417xx Datasheet (DOC ID 022033 Rev 3)